In celebration of the IBM z17 release that includes the new IBM Telum II processor, IBM partnered with LEGO Certified Professional Graeme Dymond to build a huge model of the Telum II processor, all out of Lego. This extra special Telum II has joined IBM Z teams around at some major events this year, but in case you haven't had a chance to see it in person yourself yet, we wanted to give you a closer look.
So, welcome to a "bus" ride (that's processor humor, see?) through some of our favorite features of this model! Your operators today are Devonte' Hawkins and Elizabeth K. Joseph who are both big fans of the mainframe and love geeking out over hardware together, but also happen to be big Lego fans.
Our first stop is hearing from Graeme himself in a short video he did with the media folks at IBM. In this video on LinkedIn, you'll see his three favorite things about the model: IBM Hybrid Cloud and Infrastructure: Graeme Dymond's Three Favorite Things Next stop: Graeme also shared some fun facts about the build in this series of images on LinkedIn! IBM Hybrid Cloud and Infrastructure: Serious power. Playfully built. (It's made up of HOW many bricks?)
Now first, we have the whole model, presented to you in its full glory.
But wait, what does the actual IBM Telum II look like again? Here are a couple views. The first is the shiny one, the second gives you a little better idea of the structures on this tiny processor.
Looking at them next to each other, you can really see that the designer stayed true to the processor, while also bringing some the fun and art of Lego builds into the mix.
Our first close-up is a fan favorite: The Artificial Intelligence Unit, or AIU. What’s an AIU? Time to load up the IBM z17 (9175) Technical Guide:
"IBM z17 implements the Second-Generation AI Accelerator (Artificial Intelligence Unit (AIU)). The AIU functions as a co-processor for synchronous instructions but is in the nest. The core controls the AIU by issuing Neural Network Processing Assist (NNPA) instructions.
The AIU includes the following components:
- An array macro with row and column repair (MD and ABIST).
- A 1 MB cache with single error correction double error detection (SECDEC) error-correction code."
This is a favorite because it’s amusingly, and logically, represented by robots. A little on the nose? Perhaps. But we thought it was cute.
Now, did you notice the batch of orange frogs up near the top? We looked at a lot of images of the Telum II chip, and as far as we can tell, that’s the Nest Accelerator Unit, or NXU. What makes the NXU cool? That’s where hardware compression and decompression happen!
Next stop! The airport. Well, the Open Memory Interface (OMI) which is represented with an air-traffic control tower, runway, and an airplane (which was originally white, but now is black, ask Devonte’ about it some time). This is the technology magic that allows use to connect to a huge amount of memory at very high bandwidth with very low latency.
Our next stop brings us to the giant, yellow center of the processor. What is taking up all this space? Those are the L2 caches, of course! If you've been keeping up with the story of caches on IBM Z systems over the years, you'll already be aware that they're an incredibly important part of the story of why these processors work the way they do. In the Telum II, the number and size has been bumped up from the Telum, going from eight 32MB to ten 36MB. Section 3.3.1 Cache levels and memory structure of the Technical Guide dives into this a bit more.
But the really fun thing about the Lego model is there are little people running around these caches! Indeed, I didn't even notice them until they were pointed out.
Moving down the street to our next stop, what's that splash of blue with a container ship that just sailed by? It's the PCIe Gen5 Interface! (By the way, do you know how many times PCIe is mentioned in the Technical Guide? 564. You're welcome.) In the realm of mainframes, PCIe is basically how these chips get to the outside world, from networking to storage. And pretty much everything on the left side of the Telum II processor is related to PCIe.
Now, from the perspective of innovation on the IBM Telum II, the new Data Processing Unit (DPU) is a star (right behind the AIU? Depends on who you ask!). Let's refer back to our handy IBM z17 (9175) Technical Guide to learn a bit more about this one.
"The IBM z17 DPU represents a comprehensive refactoring of the I/O subsystem.
With the DPU, functions that were previously handled by I/O adapter ASICs is integrated into the central processor (CP) chip. This design improves the quality of service compared to the traditionally overprovisioned I/O subsystem. It delivers enhanced performance, greater power efficiency, and reduced channel latency for clients.
The DPU generally carries forward existing channel capabilities while introducing important improvements and expanded functions."
And if you wish to read more section 3.4.7 IBM z17 Data Processing Unit of the same guide continues in more depth - with diagrams!
In the Lego model, the DPU is delightfully full of color.
Next stop, the cores! We can't do a processor tour without looking at the cores. Each processor comes with eight 5nm cores (well, they're a bit larger in Lego) that run at 5.5GHz each.
It's probably time to wind things down and get off this bus. Shall we park it next to the X-Bus? A-Bus? M-Bus? Ah, we'll show you all three.
All along the top of the processor you have a series of X-Bus modules.
Right next to all those, you have the A-Bus module.
And at the bottom center of your Telum II, you have the M-Bus.
Heading back to our technical guide, we learn:
"The M-bus provides interconnects between PU chips in the same DCM.
The X-bus provides interconnects between PU chips to each other in the same drawer.
The A-bus provides interconnects between different drawers by using SMP-10 cables."
And there are cute little trains that run from the buses around the processor. Love it.
We hope you enjoyed this little ride around the Lego IBM Telum II. If you're wondering what everything else is on this Lego processor, we won't leave you hanging, here's the Lego version with all the labels you'll need to find your way around:
But wait, we have one more thing for you! Being the Lego nerds we are, we wanted to bring one home. But how? That’s when Devonte’ took it upon himself to design his own IBM Telum II DCM, in Lego. It doesn’t have any frogs or airplanes, but it does look really slick.
Want to build one yourself? Devonte' also put together some instructions, along with a parts list! You can grab it over in the Fans of IBM Z Library: IBM Telum II LEGO Instructions
Elizabeth scoured her bins of Lego and then found most of the rest at her local Lego reseller, but you can also order the parts you need off of a site like BrickLinks. If you build one, we’d love to see it!
Special thanks to:
- Graeme Dymond for the build and insights he shared with folks at IBM
- PJ Catalano, who shared insight he got from Graeme and also provided several of the above images
- Kenny Stine for technical review of this blog post